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research for a student. The student then works primarily on site at NREL with both campus and NREL advisors. The professor participates in project meetings at NREL and is engaged in the NREL work. Obviously, the EM&D project takes full advantage of this innovative mechanism. In FY 2004, six students and postdocs from the Colorado School of Mines were supported for PV research through this program. 3. Results and Accomplishments The a-Si:H/c-Si heterojunction (SHJ) solar cell opens opportunities for low-temperature junction formation and higher device performance. Avoiding the high-temperature diffusion process should improve the minority-carrier lifetime in conventional c-Si wafers and may be a critical enabling technology for thin-film crystalline silicon-on-glass solar cells. Research on SHJ cells was initiated in 2004 in collaboration with the Center of Excellence at the Georgia Institute of Technology (GIT). Our work has focused on understanding and controlling the interface between the deposited silicon film and crystalline wafer. At this time, devices are simple planar junctions prepared at NREL on wafers processed by GIT using a screen-printed back contact. These have achieved Voc of 628 mV, exceeding our 620-mV project milestone. We use HWCVD to deposit low-temperature hydrogenated silicon thin films as the emitter and back-surface field (BSF) layers on p-type c-Si wafers. As the bulk of silicon PV production makes use of p-type wafers, this direction may speed industrial adoption. HWCVD could prove superior to the commonly used PECVD for SHJ solar cells because of simplicity of the system, reduced ion bombardment, low powder formation, and high densities of atomic hydrogen (H) generation, which may passivate the wafer interface region. The crystallinity of the deposited Si layer is found to be very sensitive to the deposition temperature and crystal orientation of the substrate. Crystallinity, in turn, affects an SHJ solar cell’s performance dramatically. We have found that epitaxy is more likely on a (100) substrate than on a (111) substrate, even at temperatures as low as 200°C. When we lower the substrate temperature to 100°C, abrupt amorphous silicon growth is obtained, even on a (100) wafer, yielding a Voc greater than 620 mV. Figure 1 illustrates Voc as a function of the substrate temperature for HWCVD of the amorphous silicon heterojunction layers. Fig. 1. Voc vs. HWCVD amorphous silicon deposition temperature The Silicon Materials and Devices Group is also active in using its resources to help solve near- term problems. For example, Solaicx is a PV start-up company that found help at NREL in testing prototypes for production. As part of the company’s plan to provide high-quality, low-cost silicon wafers to the photovoltaic industry, Solaicx researchers are investigating new ceramics-based crucibles designed to have longer usable life and also produce high-lifetime Czochralski silicon. They contacted our group to assist in testing the crucibles. Growth was complicated by differences in radio-frequency (rf) coupling compared with conventional quartz crucibles housed in a graphite susceptor. We modified a rf-heated crystal puller and used the Solaicx experimental crucibles to successfully grow two crystal ingots, which are now being tested at Solaicx. Assistance is of little value if results are not delivered in a quality and pace that exceed expectations. Another recent example of rapid problem solving involved collaborating with a thin-film PV company that sought to understand a new class of transparent conducting oxides. Their interest was piqued by a singular result of titanium doping in indium oxide. We applied our still developing capability in combinatorial depositionPDF Image | FY 2004 ANNUAL REPORT DOE Solar
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